If you haven't seen the previous design post here, feel free to take a look at the design stage first. Here I will discuss the building up process, what I learned, debugging and desired improvements for the project. Overall the Version 1 board was successful, a few issues I wouldn't like to ship a product with (See Figure: 1) but all of which are a learning dimension.
Figure 1: Image of the version1 design made up and tested.
Building the board was fairly straight forward despite the small footprints. I used a chisel tip simply as it is all I had, the small atmega328p pins ended up sometimes shorting but could be easily fixed by tinning a dry soldering iron using the shorted pins. I built the board starting with small SMD components, especially ones with small and painful to get to pins with other components then moving onto taller and finally throughhole components.
After building the board, programming and testing the circuit there were a few issues ranging from big to small, I've listed these below in a rough importance order.
Some of these are easier to fix than others such as connecting the Sense- doesn't need much expanation and so I'll only explain any that require some creativity. The output of the Max4080 appears to be some PWM like signal, evidently a low pass filter is required to fix these oscillations. Instead I could replace this with a differential amplifier with lasered 0.1% resistors for accuracy if required, I chose not to implement that unless needed to reduce costs as I already have a spare max4080 although I would likely change that in a future revision given the max4080 max accuracy (although typical is the same as 0.1% tolerance resistors). The display pinout I completely mucked up, these pins needed to be mixed about and slave select moved off the hardware pin as of the multiple devices. The display also dosn't fit on the board due to the tall capacitors although this would be wired realistically. Although no issues were raised, a better attempt at creating a heatplane for the LT3080 would be useful given the SMD device making sure as little thermal relief as possible. The current grounding method is messy due to a shared plane between power, analogue and digital sections. A more appropriate metho would be separate plains connected by a star point to share potential without creating ground loops. The output of the board has large (but small) holes to connect wires to for a front pannel connection, this is fine for that job but the PCB may be used without a box and why limit the board to external banana plugs when they can be mounted there. This also raises the need of having a standard distance between these holes for rigid connectors. The onboard crystal used is slightly bigger than the footprint easily fixed, but also missing capacitors for oscillations due to a datasheet misunderstanding. This crystal can also be improved a fair bit for the requirement of faster readings or updates or simply omitted and the use of an internal oscillator due to no need for correct time. The input power stage currently hasn't been tested with mains, this is a bit annoying but I don't have the facilities to test the device with mains safely. For this reason I will design future systems with mains available but also the input from an external DC source or possibly a off the shelf mains converter, although I'd like to avoid the disgusting ripples generated from them. The new board was also desinged to be 100x100mm for JLC manufacture.
All of the above issues that can be fixed in a schematic are shown below in the new design.
Figure 2: Version 2 schematic.
Again any changes required were made to the PCB, unfortuantely I couldn't find any solid online information about banana plug standard holes, sizes or spacings and so are a mix of numbers I saw and guesses.
Figure 3: Version 2 PCB design.
The renders are shown below for a better understanding of looks.
Figure 4: Version 2 front 3D render.
Figure 5: Version2 back 3D render.
When ordering the new designs I ended up ordering SMD assembly for the basic components such as resistors, capacitors and op-amps for ease and the cheap availability of these services. This was done using JLC alongised LCSC for components. Thus this triggers a new wave of waiting to test the new design and report back about successes and failures.